arXiv:hep-lat/0011004·v1·High Energy Physics — Lattice
QCDOC: A 10-teraflops scale computer for lattice QCD
D. Chen · N. H. Christ · C. Cristian · Z. Dong · A. Gara · K. Garg · B. Joo · C. Kim · L. Levkova · X. Liao · R. D. Mawhinney · S. Ohta · T. Wettig
Abstract
The architecture of a new class of computers, optimized for lattice QCD calculations, is described. An individual node is based on a single integrated circuit containing a PowerPC 32-bit integer processor with a 1 Gflops 64-bit IEEE floating point unit, 4 Mbyte of memory, 8 Gbit/sec nearest-neighbor communications and additional control and diagnostic circuitry. The machine's name, QCDOC, derives from ``QCD On a Chip''.
Comments: Lattice 2000 (machines) 8 pages, 4 figures